Overview
An embedded board needs a place to keep its boot code, its firmware and its configuration, and serial NOR Flash is the usual choice because it is small, cheap and able to run code in place. GigaDevice's GD25 family covers the role from 32 Mbit to 128 Mbit and beyond, and the GD32 microcontrollers boot from it directly. BeiLuo supplies both with genuine traceability and FAE support. This page shows how the flash and the MCU fit together in a boot-storage design.
Why Serial NOR Flash
A serial NOR Flash device has a small pin count, because it communicates over the SPI bus rather than a wide parallel bus, so it fits a small package such as the SOP8 and takes few board traces. It also has a fast random read, which means the processor can fetch and execute code directly from it, a property called execute-in-place. That combination of size, cost, few pins and in-place execution is why serial NOR is the default boot device for a microcontroller or a small system-on-chip.
Density and Headroom
The density is chosen from the total you must store: the bootloader, the main firmware, the configuration and any data. Add the parts and round up to a standard density with headroom for a future revision, because running out of flash late in a project is an expensive surprise. The GD25 family offers 4 MB, 8 MB and 16 MB options in the same package, so the density can grow without a board change.
Boot and Execute-in-Place
At power-up the MCU reads its reset vector and the first instructions from the flash, then continues to fetch the code as it runs. With the fast-read command and the Quad SPI mode the fetch keeps up with the core, so the code runs directly without being copied to RAM, which saves the RAM and the boot time. The designer confirms the read timing across the temperature range and sets the MCU cache and prefetch to hide the latency.
Read Timing and Dummy Cycles
The fast-read and the Quad-I/O read commands need a number of dummy cycles between the address and the data, and the number depends on the clock. Set the dummy cycles as the datasheet specifies for the chosen clock, and confirm the read waveform on the bench, because a wrong dummy-cycle setting is a common cause of an intermittent boot failure.
Configuration and Data
The same flash can hold the configuration, the calibration data and a small log in an area separate from the code. The uniform 4 KB sector makes the erase and the update simple, and the endurance of at least 100,000 program and erase cycles with a 20-year retention suits a product that must last. Protect the boot area with the write protection, the block protection and the security registers, so an accidental write cannot corrupt the code.
Security and Protection
The device offers software and hardware write protection, top and bottom block protection, security registers with one-time-programmable locks and a 128-bit unique ID, which support a secure-boot scheme and a device identity. Use them to protect the boot code and to store a key or a certificate.
Layout and Verification
Keep the SPI traces short and matched, place the decoupling capacitor close to the supply pins, and keep the clock trace away from the noisy nodes, because a clean SPI interface is what makes the fast read reliable. Verify the design on the bench by reading and erasing across the temperature range and by confirming the boot under the worst-case conditions. Our FAE team can review the layout and the timing with you.
Getting Help
Send your firmware size, your data requirement, the MCU and the environment to our FAE team and we will propose a density, help plan the in-place execution and the write protection and review the layout. BeiLuo holds mainstream GD25 densities in regional stock and ships them with an import declaration, a certificate of origin and a RoHS compliance file, so a boot-storage design can move from prototype to production without a supply gap.